Synopsys buys out ArchPro Design

By IANS

Bangalore : Synopsys Inc., a leading US-based semiconductor design software firm, Wednesday announced acquisition of ArchPro Design Automation Ltd, a Bangalore-based power management start-up, to enhance its low-power design and verification solution.


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Both firms declined to spell out the cost or the nature of acquisition. The deal, however, will lead to the exit of venture capital firms Intel Capital, Sage and Entrepia from ArchPro as strategic investors.

In a statement here, Synopsys said ArchPro's technologies would enable its engineers to address power management challenges in multi-voltage designs from chip architecture to RTL and gate-level design.

"These technologies allow verification of modern power management techniques such as power rating, substrate biasing, dynamic voltage and frequency scaling," Synopsys vice-president Manoj Gandhi said.

ArchPro CEO Pratap Reddy said the company's silicon-proven power management technologies were a strategic fit for Synopsys' advanced verification platform.

"As a leading solution provider for low-power designs, we play a pivotal role in driving power format standards. Post-acquisition, the synergy between our technologies and Synopsys' verification solution will enable designers to meet their targets," Reddy noted.

Integration of ArchPro's technologies will also help Synopsys to address customers' needs beyond SystemVerilog leadership and deliver the latest power management verification technologies.

With about 40-member power management team, ArchPro caters to top tier clients overseas, including in the US and Japan.

As a leader in electronic design automation (EDA) software, Synopsys delivers chip design and verification platforms, integrated circuits (IC) manufacturing and yield optimisation solutions, semiconductor intellectual property and design services to the global electronics market.

"Our solutions enable development and production of complex ICs and electronic systems. With customised solutions, we address the challenges designers and manufacturers face, including power management, accelerated time to yield and system-to-silicon verification," Gandhi said.

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