Intel designing smart chips for mobile computing devices


Bangalore : Global computer chipmaker Intel is developing next-generation microprocessors for diverse mobile computing devices that are energy efficient, scalable and high-performing, a top company official said here Wednesday.

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“Our global research labs, including the one in Bangalore, are working on advanced computing technologies such as ultra-mobility, long battery life, high performance per watt and rich sensing to build new applications in education, healthcare and entertainment,” Intel chief technology officer Justin Rattner told reporters.

The 15 corporate technology group (CTG) labs of the $39-billion world’s largest semiconductor firm, located in the US, Europe and Asia (India and China) are focusing on processor circuits and multi-core chips.

For instance, Intel’s research lab in India has designed and developed a prototype of a mobile computing device to monitor health parameters of patients and stressed out people on a real-time basis.

The prototype, co-developed by Intel India and Intel US teams, monitors multiple physiological parameters using a wireless body area network. Besides ease of use, mobility, power efficiency and reliability, the device helps to generate real-time data for enabling quick investigation and treatment.

“As preventive care is relevant to Indian market, the mobile health monitoring system will improve access and reduce the cost of healthcare. Mobile care will enable even the under-served population in the subcontinent to access treatment from inaccessible or remote areas,” Rattner said at a demo of the prototype.

Intel labs have also developed an adaptive snoozing technology for energy saving and higher performance per watt. The new technology adapts to the network traffic seamlessly and senses automatically when there is no activity.

“The technology switches off the radio to save power for the platform and minimise over-the-air interference. Adaptive snoozing can provide up to 80 percent power saving over the network interface card,” Rattner noted.

Referring to the major contribution of Intel India research lab in developing the world’s first programmable chip to deliver more than a teraflop of performance at lower power (62 watts), Rattner said the teraflop wafer would help reduce the workloads of enterprises in the financial services sector.

A teraflop is a processor speed of one trillion numeric operations per second.

“The tera-scale computing platform will have special purpose engines to enhance performance of certain fixed functions such as network processing, encoding and decoding, encryption and decryption and XML processing.”

“Our researchers in the Bangalore lab are also inventing tools to enable designers build a particular product. The long-term goal is to accelerate the convergence of computing and communications,” Rattner said.